Patent attributes
The semiconductor device includes a resistor cell that includes a diffused layer resistor, a P-well contact and an N-well contact. The diffused layer resistor is arranged on a semiconductor substrate and is formed by a diffused layer. The P-well contact surrounds an outer rim of the diffused layer resistor and is formed by another diffused layer. The N-well contact is arranged surrounding the outer rim of the P-well contact and is formed by a further diffused layer. Both the P-well and N-well contacts are partitioned into contact portions. Control electrode layer portions are arranged between neighboring contact sections of the P-well contact so the contact sections of the P-well contact and the control electrode layer portions alternate. Control electrode layer portions are arranged between neighboring contact sections of the N-well contact so that the contact sections of the N-well contact and the control electrode layer portions alternate with one another.
