Patent attributes
An update control apparatus in a DLL circuit is provided. The update control apparatus includes a logic value determination, a phase information collection unit, and an update control unit. The logic value determination unit is configured to determine a logic value of a phase detection signal for a first period interval of a reference clock signal to generate a phase information signal, and configured to extend the first period interval into a second period interval when an extension instruction signal is enabled. The phase information collection unit is configured to determine consecutive logic values of an update possible signal to generate the extension instruction signal, and configured to collect the phase information signal to generate an update information signal. The update control unit is configured to generate the update possible signal, a valid interval signal, and an update control signal in response to the update information signal.
