US Patent 7952946 No-disturb bit line write for improving speed of eDRAM

A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines.