Patent attributes
An erasing method in a nonvolatile memory device is disclosed. The method includes post-programming dummy memory cells; verifying whether threshold voltages of the dummy memory cells are greater than or equal to a first voltage; post-programming normal memory cells; and verifying whether threshold voltages of the normal memory cells are greater than or equal to a second voltage. The first voltage is different from the second voltage, and the post-programming of the dummy memory cells comprises: applying a program voltage to a plurality of dummy word lines coupled to the dummy memory cells to post-program the dummy memory cells; and applying a pass voltage to a plurality of normal word lines coupled to the normal memory cells so that the normal memory cells are not post-programmed.
