Patent 7962886 was granted and assigned to Cadence Design Systems on June, 2011 by the United States Patent and Trademark Office.
A method and system for generating design constraints for an electronic circuit design is disclosed. The method and system include reading a design description and an existing design constraint file, configuring design constraint integration rules, writing a new design constraint file, evaluating results of the new design constraint file, and replacing existing design constraint file with the new design constraint file.