US Patent 7966479 Concurrent vs. low power branch prediction
Patent 7966479 was granted and assigned to Oracle on June, 2011 by the United States Patent and Trademark Office.
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An instruction processing circuit includes a decoder circuit, a basic block builder circuit, a multi-block builder circuit, first and second predictor circuits, and a sequencer circuit, where the sequencer circuit is operable, in a first environment, to cause the first predictor circuit to generate a prediction for a particular conditional branch op concurrently with the second predictor circuit generating a prediction for another particular conditional branch op, where the sequencer circuit is also operable, in a second environment, to cause the first predictor circuit to generate a prediction for the particular conditional branch op sequentially with the second predictor circuit generating a prediction for the another particular conditional branch operation.
US Patent 07966479 Concurrent vs. low power branch prediction US Patent 7966479 Concurrent vs. low power branch prediction
US Patent 07966479 Concurrent vs. low power branch prediction
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