Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Sung II Oh0
Hye Jin Cho0
Jae Woo Joung0
Date of Patent
June 28, 2011
Patent Application Number
12662092
Date Filed
March 30, 2010
Patent Primary Examiner
Patent abstract
A method for manufacturing a printed wiring board having one or more layers of a conductive pattern and an insulating pattern, including forming an insulating pattern on an insulating substrate; semi-hardening at least one of the insulating substrate and the insulating pattern; forming a conductive pattern on the insulating substrate and/or the insulating pattern, thereby providing a stack structure; performing a thermal treatment on the stack structure to fully harden the semi-hardened insulating substrate and/or insulating pattern; and firing the conductive pattern. In the method, the conductive pattern and the insulating pattern are simultaneously formed on the same layer using an inkjet process.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.