Patent attributes
A liquid crystal display includes a substrate first and second gate lines; first and second data lines, a storage electrode line, a first thin film transistor having a control terminal connected to the first gate line and an input terminal connected to the first data line, a second thin film transistor having a control terminal connected to the first gate line and an input terminal connected to the first data line, a first sub-pixel electrode connected to the output terminal of the first thin film transistor, a second sub-pixel electrode connected to the output terminal of the second thin film transistor, a third thin film transistor having a control terminal connected to the second gate line and an input terminal connected to the first sub-pixel electrode, and a first capacitive conductor connected to the output terminal of the third thin film transistor and overlapping a portion of the storage electrode line to form a voltage reducing capacitor.
