US Patent 7977765 Antifuse circuit with well bias transistor

An antifuse circuit includes a terminal, an antifuse transistor, and a bias transistor. The antifuse transistor is formed on a substrate. The antifuse transistor is coupled to the terminal and includes a first gate terminal coupled to receive a first select signal. The bias transistor is coupled between the substrate and a bias voltage terminal. The bias transistor has a second gate terminal and is operable to couple the bias voltage terminal to the substrate responsive to an assertion of a bias enable signal at the second gate terminal.