Patent attributes
An arrangement scheme for a power/ground (P/G) network of an integrated circuit is provided. Rows of standard cells in the integrated circuit are horizontally arranged. The P/G network has horizontal and vertical metal lines arranged in different metal layers. The horizontal metal lines have horizontal power metal lines and horizontal ground lines. The vertical metal lines have vertical power metal lines and vertical ground lines. The power lines and the ground lines in the horizontal metal lines are respectively interconnected with the power lines and the ground lines of the vertical metal lines. The width of the horizontal metal wires in the P/G network is such that the horizontal power metal lines only cover the power lines in the rows of the standard cells, while the horizontal ground metal lines only cover the ground lines of the rows of the standard cells. By employing the technical features of the present invention compliant with the conditions of IR drop, power consumption and noise, the P/G network is rearranged and the metal line width can be determined based on the design rules for integrated circuit and the repeatability of the rows of the standard cells, thus avoiding function failure or waste of layout resources due to overlapping or inappropriate line width, thereby accommodating the requirement for chip designs.
