US Patent 7994821 Level shifter circuits and methods

A level shifter circuit includes first and second transistors coupled in series and third and fourth transistors coupled in series. The fourth transistor is coupled to a first node between the first and the second transistors. The level shifter circuit also includes fifth and sixth transistors coupled in series and seventh and eighth transistors coupled in series. The eighth transistor is coupled to a second node between the fifth and the sixth transistors. The second and the eighth transistors receive a first input signal at control inputs. The fourth and the sixth transistors receive a second input signal at control inputs. The second input signal is inverted relative to the first input signal.