An analog front-end circuit includes an analog processing circuit, an A/D converter, a calculation circuit, and a target register in which a black level target value is set. The analog processing circuit includes a clamp circuit that performs a line clamp operation, and an offset adjustment circuit. The calculation circuit monitors an A/D-converted value of a black reference pixel after the line clamp operation in a black level monitor period after a line clamp period but before an effective pixel output period, and performs a black level error correction process by writing an offset adjustment value that causes the A/D-converted value to be set at the black level target value into the offset adjustment register.