A signal processing circuit includes a signal processing section which generates first address data and second address data in accordance with data processing, reads data stored in an external memory based on the first address data and the second address data for performing a predetermined processing, and outputs processed data along with the first address data and the second address data, an address conversion section which, receiving the first address data and the second address data input thereto, holds at least 1 bit of the first address and outputs third address data, and also adds the at least 1 bit of the held first address data to the second address and outputs fourth address data, and a data interface which performs a writing operation or a reading operation of the data processed by the signal processing section with respect to the external memory on the basis of a time when the address conversion section outputs the third address data and the forth address data.