US Patent 8009471 Low-wear writing in a solid state memory device

A method includes programming a non-volatile memory. The memory includes a plurality of cells, wherein each cell is configured to store a plurality of values, wherein each of value is represented by N digits where N is an integer greater than 1, wherein each of the plurality of cells is further configured to store electric charge representing a plurality of voltage levels, and wherein each of the plurality of voltage levels represents one of the plurality of values. Programming comprises providing the plurality of voltage levels into a first group of voltage levels and a second group of voltage levels in one of the plurality of cells, wherein a highest voltage level of the first group is less than or substantially equal to a lowest voltage level of the second group, and storing, in the first group of voltage levels, electric charge representing a value comprising, at most, N-1 digits.