US Patent 8012811 Methods of forming features in integrated circuits

A feature is formed in an integrated circuit by providing one or more layers to be patterned, providing a first layer overlying the one or more layers to be patterned, and providing a second layer overlying the first layer. The second layer is patterned to form a raised feature with one or more sidewalls. Subsequently, the first layer is processed such that components of the first layer deposit on the one or more sidewalls of the raised feature to form a mask. The mask is used to pattern the one or more layers to be patterned.