US Patent 8014487 High-frequency counter

A counter circuit and method of controlling such a counter circuit, including a first counting section that counts in accordance with a state-cycle, and a second counting section clocked by the first counting section. At least one invalid counting state is introduced by controlling the second counting section to change its state before the first counting section has completed the state-cycle; and the invalid counting state is then detected and corrected. Thereby, some redundancy is introduced in the counter, which can be used to detect and correct incomplete switching of counter states.