Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Tetsuya Uchida0
Yasuhiro Kimura0
Atsushi Maeda0
Hiroshi Ishida0
Minoru Abiko0
Natsuo Yamaguchi0
Norio Ishitsuka0
Shoji Yoshida0
...
Date of Patent
October 11, 2011
Patent Application Number
12262180
Date Filed
October 31, 2008
Patent Citations Received
Patent Primary Examiner
Patent abstract
A technique that makes it possible to suppress a crystal defect produced in an active area and thereby reduce the fraction defective of semiconductor devices is provided. A first embodiment relates to the planar configuration of SRAM. One of the features of the first embodiment is as illustrated in FIG. 4. That is, on the precondition that the active areas in n-channel MISFET formation regions are all configured in the isolated structure: the width of the terminal sections is made larger than the width of the central parts of the active areas. For example, the terminal sections are formed in an L shape.
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