Patent attributes
A system and method for accurately modeling a fault log is provided for validating one or more elements of fault detection and logging logic for a real-time fault log of a digital system such as, for instance, a computer processor. The method includes injecting one or more known faults into a data path and/or a control path of the computer processor and spawning an individual tracking thread for each of the injected faults. The tracking threads may be synchronized at a predefined synchronization point that is selected as a function of a collective logging delay representing the time required for each of the injected faults to reach a real-time logging point within the computer processor. Once synchronized, the tracking threads may be input into a fault logging specification for fault behavior and/or system impact modeling and fault prioritization for use in generating a fault log model for comparison to the real-time fault log maintained within the computer processor.
