US Patent 8095759 Error management firewall in a multiprocessor computer
Patent 8095759 was granted and assigned to Cray Inc. on January, 2012 by the United States Patent and Trademark Office.
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Patent abstract
A multiprocessor computer system comprises a plurality of processors and a plurality of nodes, each node comprising one or more processors. A local memory in each of the plurality of nodes is coupled to the processors in each node, and a hardware firewall comprising a part of one or more of the nodes is operable to prevent a write from an unauthorized processor from writing to the local memory.
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Patent Inventor Names
Aaron F. Godfrey0
Dennis C. Abts0
Steven L. Scott0
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US Patent 08095759 Error management firewall in a multiprocessor computer US Patent 8095759 Error management firewall in a multiprocessor computer
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Patent Number
08095759
Patent Number
8095759
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US Patent 08095759 Error management firewall in a multiprocessor computer
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Is a
Current assignee
Patent jurisdiction
Patent number
08095759
Date of patent
January 10, 2012
Patent application number
12474556
Date Filed
May 29, 2009
Patent primary examiner
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