US Patent 8104009 Wire mapping for programmable logic devices
Patent 8104009 was granted and assigned to Lattice Semiconductor on January, 2012 by the United States Patent and Trademark Office.
Is a
Current Assignee
Date Filed
February 14, 2011
Date of Patent
January 24, 2012
Patent Application Number
13026555
Patent Citations Received
Patent Jurisdiction
Patent Number
Patent Primary Examiner
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