US Patent 8122307 One time programmable memory test structures and methods
Patent 8122307 was granted and assigned to Synopsys on February, 2012 by the United States Patent and Trademark Office.
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Patent abstract
One Time Programmable (OTP) memory structures and methods for pretesting the support circuitry are provided. A group of dedicated test cells associated with one or more groups of regular OTP cells are used to test the support circuitry for the regular OTP cells. The dedicated cells are programmed and read. The read values are compared to the programmed values or expected values. As a result of the comparison, failing memories may be designated “Not Usable”, while regular OTP cells of passing memories can be programmed for their purpose resulting in elimination of wasted memories during test.
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Patent Inventor Names
Andrew E. Horch0
Chad A. Lindhorst0
Ernest Allen, III0
Todd E. Humes0
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US Patent 08122307 One time programmable memory test structures and methods US Patent 8122307 One time programmable memory test structures and methods
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Patent Number
08122307
Patent Number
8122307
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US Patent 08122307 One time programmable memory test structures and methods
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Is a
Current assignee
Patent jurisdiction
Patent number
08122307
Date of patent
February 21, 2012
Patent application number
11768974
Date Filed
June 27, 2007
Patent primary examiner
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