Patent attributes
A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the portions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.
