US Patent 8159424 Display device and electronic apparatus

Disclosed herein is a sampling transistor in an embodiment of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to a scan line WS to the falling of the control pulse, and samples a video signal from a signal line SL to write the video signal to a hold capacitor. The sampling transistor includes the channel region between the source and the drain and has a sandwich gate structure in which a shield that electrically shields the channel region is disposed on the other side of the channel region. This suppresses change in the threshold voltage of the sampling transistor.