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US Patent 8183627 Hybrid fin field-effect transistor structures and related methods

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US Patent 12132111 Formation method of semiconductor device structure with gate stacks
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US Patent 12020980 Semiconductor structure and forming method thereof
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US Patent 11855151 Multi-gate device and method of fabrication thereof
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Patent abstract

Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide.

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Matthew T. Currie0
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US Patent 11749720 Integrated circuit structure and method with solid phase diffusion
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US Patent 11749682 Selective dual silicide formation using a maskless fabrication process flow
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US Patent 08183627 Hybrid fin field-effect transistor structures and related methods US Patent 8183627 Hybrid fin field-effect transistor structures and related methods

Infobox
Patent Number
081836270
Patent Number
81836270
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Is a
Patent
Patent
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
081836270
Date of Patent
May 22, 2012
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Patent Application Number
121253080
Date Filed
May 22, 2008
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Patent Primary Examiner
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David Hung Vu
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 US Patent 08183627 Hybrid fin field-effect transistor structures and related methods

Infobox
Is a
Patent
Patent
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
08183627
Date of patent
May 22, 2012
Patent application number
12125308
Date Filed
May 22, 2008
Patent primary examiner
‌
David Hung Vu

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