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US Patent 8201129 PLD architecture for flexible placement of IP function blocks

Patent 8201129 was granted and assigned to Altera on June, 2012 by the United States Patent and Trademark Office.

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Patent abstract

In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

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