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US Patent 8266383 Cache miss processing using a defer/replay mechanism

Patent 8266383 was granted and assigned to NVIDIA on September, 2012 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Current Assignee
NVIDIA
NVIDIA
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Date Filed
December 30, 2009
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Date of Patent
September 11, 2012
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Patent Application Number
12650189
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Patent Citations Received
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US Patent 12135646 Cache coherence shared state suppression
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US Patent 11714754 Shadow caches for level 2 cache controller
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US Patent 11756593 Memory control circuit, information processing system, and memory control method
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US Patent 11789868 Hardware coherence signaling protocol
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US Patent 11921637 Write streaming with cache write acknowledgment in a processor
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US Patent 11940918 Memory pipeline control in a hierarchical memory system
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US Patent 12020064 Rescheduling a failed memory request in a processor
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Patent Inventor Names
Rajeshwaran Selvanesan
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Robert J. Stoll
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Steven J. Heinrich
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Stewart Glenn Carlton
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Alexander L. Minkin
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Charles McCarver
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Ming Y. Siu
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Yan Yan Tang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
8266383
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Patent Primary Examiner
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Edward Dudek, Jr.
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