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US Patent 8310265 IC testing methods and apparatus
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Patent
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Date Filed
April 30, 2008
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Date of Patent
November 13, 2012
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Patent Application Number
12596734
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Patent Citations Received
US Patent 12092684 Integrated circuit workload, temperature, and/or sub-threshold leakage sensor
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US Patent 11762013 Integrated circuit profiling and anomaly detection
US Patent 11762789 Integrated circuit I/O integrity and degradation monitoring
US Patent 12072376 Die-to-die connectivity monitoring
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US Patent 11921160 Using scan chains to read out data from integrated sensors during scan tests
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US Patent 11841395 Integrated circuit margin measurement and failure prediction device
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US Patent 11929131 Memory device degradation monitoring
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US Patent 12013800 Die-to-die and chip-to-chip connectivity monitoring
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US Patent 12123908 Loopback testing of integrated circuits
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Patent Inventor Names
Amir Zjajo
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Jose De Jesus Pineda De Gyvez
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Manuel Jose Barragan Asian
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
8310265
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Patent Primary Examiner
Tung X Nguyen
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