Patent attributes
A capacitive interface circuit for a low power system is described. The capacitive interface circuit is configured to achieve very low noise sensing of capacitance-based transducers, such as a micro-electro-mechanical system (MEMS)-based sensor, with high resolution and low power. The capacitive interface circuit uses a differential amplifier and correlated triple sampling (CTS) to substantially eliminate, or at least reduce, kT/C noise, as well as amplifier offset and flicker (1/f) noise, from the output of the amplifier. The capacitive interface circuit may further include an output stage that reduces glitching, i.e., clock transients, in the output signal by allowing transients in the amplifier output to settle. In this manner, the circuit can be used in a low power system to produce a stable, low-noise output.
