US Patent 8362800 3D semiconductor device including field repairable logics
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Patent abstract
A three dimensional semiconductor device is described with two transistor layers overlaid. The first transistor layer comprises a plurality of flip-flops each having an input and an output, wherein the inputs are selectively coupleable to the second transistor layer.
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Patent Inventor Names
Ze'ev Wurman0
Zvi Or-Bach0
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US Patent 08362800 3D semiconductor device including field repairable logics US Patent 8362800 3D semiconductor device including field repairable logics
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Patent Number
083628000
Patent Number
83628000
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Patent Jurisdiction
Patent Number
083628000
Date of Patent
January 29, 2013
0Patent Application Number
129041080
Date Filed
October 13, 2010
0Patent Primary Examiner
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US Patent 08362800 3D semiconductor device including field repairable logics
Infobox
Is a
Patent jurisdiction
Patent number
08362800
Date of patent
January 29, 2013
Patent application number
12904108
Date Filed
October 13, 2010
Patent primary examiner
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