Log in
Enquire now
‌

US Patent 8390325 Reconfigurable integrated circuit architecture with on-chip configuration and reconfiguration

OverviewStructured DataIssuesContributors

Contents

Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8390325
Patent Inventor Names
Stephen L. Wasson0
Steven Hennick Kelem0
Brian A. Box0
John M. Rudosky0
Date of Patent
March 5, 2013
Patent Application Number
13216212
Date Filed
August 23, 2011
Patent Citations Received
‌
US Patent 12106099 Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric
0
‌
US Patent 11675734 Loop thread order execution control of a multi-threaded, self-scheduling reconfigurable computing fabric
0
‌
US Patent 11868163 Efficient loop execution for a multi-threaded, self-scheduling reconfigurable computing fabric
0
‌
US Patent 11880687 System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network
0
‌
US Patent 11886377 Reconfigurable arithmetic engine circuit
0
‌
US Patent 11907157 Reconfigurable processor circuit architecture
0
‌
US Patent 11915057 Computational partition for a multi-threaded, self-scheduling reconfigurable computing fabric
0
‌
US Patent 11977509 Reconfigurable processor circuit architecture
0
...
Patent Primary Examiner
‌
Vibol Tan
Patent abstract

The exemplary embodiments provide a reconfigurable integrated circuit capable of on-chip configuration and reconfiguration, comprising: a plurality of configurable composite circuit elements; a configuration and control bus; a memory; and a sequential processor. Each composite circuit element comprises: a configurable circuit; and an element interface and control circuit, the element interface and control circuit comprising an element controller and at least one configuration and control register to store one or more configuration and control words. The configuration and control bus is coupled to the plurality of configurable composite circuit elements, and comprises a plurality of address and control lines and a plurality of data lines. The sequential processor can write configurations to the configuration and control registers of an addressed configurable composite circuit element to configure or reconfigure the configurable circuit.

Timeline

No Timeline data yet.

Further Resources

Title
Author
Link
Type
Date
No Further Resources data yet.

References

Find more entities like US Patent 8390325 Reconfigurable integrated circuit architecture with on-chip configuration and reconfiguration

Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
Open Query Tool
Access by API
Golden Query Tool
Golden logo

Company

  • Home
  • Press & Media
  • Blog
  • Careers
  • WE'RE HIRING

Products

  • Knowledge Graph
  • Query Tool
  • Data Requests
  • Knowledge Storage
  • API
  • Pricing
  • Enterprise
  • ChatGPT Plugin

Legal

  • Terms of Service
  • Enterprise Terms of Service
  • Privacy Policy

Help

  • Help center
  • API Documentation
  • Contact Us