US Patent 8457945 Processor-in-the-loop co-simulation of a model

A model may be constructed and simulated using processor-in-the-loop co-simulation at a target device. In one implementation, a host environment may provide a graphical environment that facilitates construction of the model defined as a plurality of functional blocks. The host environment may receive, via graphical selection menus associated with the blocks of the model, an indication of which blocks of the model are to simulated at an external target device and which blocks of the model are to be simulated at the host environment. Further, the host environment may receive a command, that may be entered interactively by a user, to start simulation of the model and execute, in response to the command, co-simulation of the model at the host environment and the external target device.