Patent attributes
A multi-processor system is disclosed comprising a first processor, a first memory coupled to the first processor, a second processor, and a shared memory subsystem including a shared memory and a data transfer unit. The first processor is configured to build a data structure in the first memory and to send a direct memory access (DMA) transfer request to the data transfer unit of the shared memory subsystem, the DMA transfer request including an address of the data structure in the first memory. The data transfer unit is configured to retrieve the data structure from the first memory based on the DMA transfer request, to store the data structure in the shared memory, and to send a shared memory pointer to the second processor indicating an address of the data structure in the shared memory.
