Patent attributes
To include a refresh control circuit that generates a refresh execution signal in response to a refresh command supplied from outside, and a refresh address counter that performs a counting operation in response to activation of the refresh execution signal. The refresh control circuit generates the refresh execution signal 2n times in response to one supply of the refresh command, where n is an integer equal to or larger than 0 and equal to or less than k. The value of n is variable based on a refresh-mode specifying signal supplied from outside in synchronization with the refresh command. With this configuration, for example, a frequency of generation of the refresh execution signal in response to one supply of the refresh command can be changed dynamically, flexible control can be performed by a controller.
