Patent attributes
An inverter comprising: a circuit including arms connected in parallel, each of the arms including a first switch and a second switch connected in series; and a gate drive circuit configured to control, by pulse-width modulation using synchronous rectification, each of the first switch and the second switch to switch to an on-state or an off-state, wherein each of the first switch and the second switch includes: a channel region that is conductive in both a forward direction and a reverse direction in the on-state, and that is not conductive in the forward direction in the off-state; and a diode region that is combined as one with the channel region, and that is conductive only in the reverse direction, the diode region being unipolar, and the gate drive circuit synchronizes a timing at which the gate drive circuit outputs a signal for causing the first switch to switch to the on-state with a timing at which the gate drive circuit outputs a signal for causing the second switch to switch to the off-state, and synchronizes a timing at which the gate drive circuit outputs a signal for causing the first switch to switch to the off-state with a timing at which the gate drive circuit outputs a signal for causing the second switch to switch to the on-state.
