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US Patent 8703565 Bottom-notched SiGe FinFET formation using condensation

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
March 11, 2013
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Date of Patent
April 22, 2014
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Patent Application Number
13794458
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Patent Citations Received
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US Patent 12132111 Formation method of semiconductor device structure with gate stacks
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US Patent 11699758 Isolation structure having different distances to adjacent FinFET devices
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US Patent 11749720 Integrated circuit structure and method with solid phase diffusion
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US Patent 11749682 Selective dual silicide formation using a maskless fabrication process flow
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US Patent 11855151 Multi-gate device and method of fabrication thereof
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Patent Inventor Names
Chih-Hsiang Chang
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Chih-Hao Chang
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Jeffrey Junhao Xu
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Chien-Hsun Wang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
8703565
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Patent Primary Examiner
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Yu-Hsi D Sun
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