US Patent 8730712 SRAM including write assist circuit and method of operating same

A static random access memory (SRAM) is described and includes; a bit cell connected with a word line, connected between a bit line and a complementary bit line, and receiving an internal voltage from a write assist circuit. The write assist circuit includes a power control circuit that charges/discharges an internal voltage line to provide the internal voltage in response to at least one control signal, and a compensation circuit that controls a level of the internal voltage.