Patent attributes
The present disclosure relates to a method for Analog-to-Digital Converter Based Decision Feedback Equalization. The method may include providing an integrated circuit including a SERDES circuitry having a transmit circuitry and a receiver circuitry and receiving a high-speed data stream at the receiver circuitry. The method may also include converting the high-speed data stream to a digital signal using a successive approximation analog-to-digital converter and providing the digital signal to a digital decision feedback equalization circuitry via the successive approximation analog-to-digital converter. The method may also include generating an output signal at a phase locked loop and receiving the output signal at a multi-loop clock and data recovery circuitry.
