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US Patent 8924455 Multiplication of matrices using systolic arrays

Patent 8924455 was granted and assigned to Xilinx on December, 2014 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Current Assignee

Xilinx

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

89244550

Patent Inventor Names

Kaushik Barman0

Parag Dighe0

Ragahavendar M. Rao0

Date of Patent

December 30, 2014

Patent Application Number

130356000

Date Filed

February 25, 2011

Patent Citations Received

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US Patent 12093148 Neural network quantization parameter determination method and related products

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US Patent 12014272 Vector computation unit in a neural network processor

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US Patent 12067375 Systolic array including fused multiply accumulate with efficient prenormalization and extended dynamic range

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US Patent 12073215 Computing device with a conversion unit to convert data values between various sizes of fixed-point and floating-point data

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US Patent 12086097 Vector computational unit

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US Patent 11703939 Signal processing device and related products

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Patent Primary Examiner

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Chuong D. Ngo

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