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US Patent 8967452 Thermal compression bonding of semiconductor chips
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Patent
Date Filed
April 17, 2012
Date of Patent
March 3, 2015
Patent Application Number
13448866
Patent Citations Received
US Patent 12074135 Semiconductor device and method of controlling warpage during LAB
0
US Patent 11756851 Compression-loaded printed circuit assembly for solder defect mitigation
US Patent 11791231 Compression-loaded printed circuit assembly for solder defect mitigation
US Patent 11961818 Substrates with heat transfer structures for bonding a stack of microelectronic devices, and related assemblies and electronic systems
0
US Patent 11688718 Semiconductor device and method of controlling warpage during LAB
0
US Patent 11705425 Thermocompression bond tips and related apparatus and methods
0
US Patent 11749595 Fabrication process and structure of fine pitch traces for a solid state diffusion bond on flip chip interconnect
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
8967452
Patent Primary Examiner
Kiley Stoner
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