US Patent 8971115 Semiconductor memory device

A semiconductor memory device includes a string of memory cell transistors that are connected to each other in series. A selection transistor is connected between one end of the string of the memory cell transistors and one of a source line and a bit line. A line is selectively connected to a gate electrode of the selection transistor, a driver, or a node that supplies an unselected voltage, or is set to be in a floating state.