US Patent 8975935 Analog pulse delay circuit with multiple output potential
Patent 8975935 was granted and assigned to Hrl Laboratories, Llc on March, 2015 by the United States Patent and Trademark Office.
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A delay circuit includes a first flip flop (FF), a transistor connected to the FF, a first resistor capacitor circuit (RCC) coupled to the transistor and between a voltage and a ground, a first comparator for comparing an output of the first RCC and a voltage reference, gate logic coupled to the input line and to an output of the first FF and to a second FF, a second transistor coupled to the second FF, a second RCC coupled to the second transistor and between the voltage and ground, a second comparator for comparing an output of the second RCC and the voltage reference and coupled to the first FF, and output logic coupled to the first and second comparators.
US Patent 08975935 Analog pulse delay circuit with multiple output potential US Patent 8975935 Analog pulse delay circuit with multiple output potential
US Patent 08975935 Analog pulse delay circuit with multiple output potential
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