US Patent 8995596 Techniques for calibrating a clock signal
Patent 8995596 was granted and assigned to Altera on March, 2015 by the United States Patent and Trademark Office.
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Circuits and techniques for operating an integrated circuit are disclosed. A disclosed method includes receiving a data packet with a first operating frequency rate with first and second receiver circuits. The data packet may include a plurality of preamble bits. The first and second receiver circuits may operate at second and third operating frequency rates, respectively. A portion of the data packet received at the first receiver circuit is transmitted to a control circuit. The plurality of preamble bits within the portion of the data packet is identified with the control circuit. A clock circuit is then calibrated based on the plurality of preamble bits. The first and second receiver circuits may be clocked with first and second clock outputs from the clock circuit.
US Patent 08995596 Techniques for calibrating a clock signal US Patent 8995596 Techniques for calibrating a clock signal
US Patent 08995596 Techniques for calibrating a clock signal
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