US Patent 9003166 Generating hardware accelerators and processor offloads
Patent 9003166 was granted and assigned to Synopsys on April, 2015 by the United States Patent and Trademark Office.
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System and method for generating hardware accelerators and processor offloads. System for hardware acceleration. System and method for implementing an asynchronous offload. Method of automatically creating a hardware accelerator. Computerized method for automatically creating a test harness for a hardware accelerator from a software program. System and method for interconnecting hardware accelerators and processors. System and method for interconnecting a processor and a hardware accelerator. Computer implemented method of generating a hardware circuit logic block design for a hardware accelerator automatically from software. Computer program and computer program product stored on tangible media implementing the methods and procedures of the invention.
US Patent 09003166 Generating hardware accelerators and processor offloads US Patent 9003166 Generating hardware accelerators and processor offloads
US Patent 09003166 Generating hardware accelerators and processor offloads
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