US Patent 9064067 Quantum gate optimizations

Disclosed are systems and methods for improving quantum computation simulation execution time by “growing” sets of small quantum gates into larger ones. Two approaches are described. In the first approach, sub-strings may be replaced by a single representative that may be used multiple times throughout the quantum circuit. In the second approach, nearby gates may be coalesced in an iterative fashion, to thereby build larger and larger gates. Results may be cached for re-use. Both of these approaches have proven effective and have gained typical simulation speed-ups of 1-2 orders of magnitude.