US Patent 9071256 Method for link resets in a SerDes system

The present disclosure relates to a method for use with a serializer/deserializer comprising. The method may include grouping one or more lane modules associated with an integrated circuit (IC) together to form a link, wherein each of the one or more lane modules includes a reset state machine and a high speed reset generator. The method may also include providing a common module having a common reset release state machine and a reset release synchronizer and pulse generator, the common module and one or more lane modules being configured to communicate therebetween. The method may further include resetting each link independently using the one or more lane modules.