US Patent 9117523 Chainlink memory

A nonvolatile alternative to DRAM or Flash is disclosed. It involves a new “magnetic shift register” that avoids the bit annihilation problem that plagues magnetic racetrack memories. Using this new “chainlink memory” approach, one avoids the annihilation problem inherent in racetrack memory by breaking up the racetrack into magnetically coupled links, where each link preferably handles one bit exclusively. Depending upon the implementation, the “bit” can be, for example, the magnetization of a link, presence or absence of a domain wall, or the polarity of a domain wall. Numerous examples and applications of this new chainlink technology are disclosed.