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US Patent 9167710 Embedded packaging with preformed vias
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Patent
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Date Filed
August 7, 2013
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Date of Patent
October 20, 2015
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Patent Application Number
13961344
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Patent Citations Received
US Patent 12087629 Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon
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US Patent 11990382 Fine pitch BVA using reconstituted wafer with area array accessible for testing
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US Patent RE49987 Multiple plated via arrays of different wire heights on a same substrate
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
9167710
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Patent Primary Examiner
Hung S. Bui
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