Patent attributes
A sequencer of a processing unit determines, at runtime, a barrier width of a barrier operation for a group threads, wherein the barrier width is smaller than a total number of threads in the group of threads, and wherein threads in the group of threads execute data parallel code on one or more compute units. In response to each thread in a subgroup of the group of threads having executed the barrier operation, the subgroup including a same number of threads as the barrier width, the sequencer may enable the subgroup of the group of threads to execute on the one or more processors past the barrier operation without waiting for other threads in the group of threads to execute the barrier operation, wherein the subgroup of the group of threads is smaller than the total number of threads in the group of threads.
