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US Patent 9287382 Structure and method for semiconductor device
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Patent
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Date Filed
November 6, 2014
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Date of Patent
March 15, 2016
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Patent Application Number
14535005
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Patent Citations Received
US Patent 11948842 Etch stop layer between substrate and isolation structure
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US Patent 11769771 FinFET device having flat-top epitaxial features and method of making the same
US Patent 11856743 Flexible merge scheme for source/drain epitaxy regions
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Patent Inventor Names
Tze-Liang Lee
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Chii-Horng Li
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Kun-Mu Li
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Yi-Jing Lee
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
9287382
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Patent Primary Examiner
Monica D Harrison
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