Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Keisuke Ueda0
Ryo Endo0
Toshiya Uozumi0
Date of Patent
March 22, 2016
0Patent Application Number
145515180
Date Filed
November 24, 2014
0Patent Citations Received
Patent Primary Examiner
Patent abstract
To reduce the influence of a spurious in a high-frequency signal processing device and a wireless communication system each provided with a digital type PLL circuit. In a digital type PLL circuit including a digital phase comparator unit, a digital low-pass filter, a digital control oscillator unit, and a multi-module driver unit (frequency divider unit), the clock frequency of a clock signal in the digital phase comparator unit is configured selectably among a plurality of options. The clock frequency is selected among frequencies which are integer multiples of a reference frequency, in accordance with which frequency band of a standard is to be set for an oscillation output signal of the digital control oscillator unit.
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